Resource Sharing of Pipelined Custom Hardware Extension for Energy-Efficient Application-Specific Instruction Set Processor Design
نویسندگان
چکیده
منابع مشابه
Efficient design-space exploration of custom instruction-set extensions
Customization of processors with instruction set extensions (ISEs) is a technique that improves performance through parallelization with a reasonable area overhead, in exchange for additional design effort. This thesis presents a collection of novel techniques that reduce the design effort and cost of generating ISEs by advancing automation and reconfigurability. In addition, these techniques m...
متن کاملHASHI: An Application Specific Instruction Set Extension for Hashing
Hashing is one of the most relevant operations within query processing. Almost all core database operators like groupby, selections, or different join implementations rely on highly efficient hash implementations. In this paper, we present a way to significantly improve performance and energy efficiency of hash operations using specialized instruction set extensions for the Tensilica Xtensa LX5...
متن کاملAutomatic Instruction Set Design Through Efficient Instruction Encoding for Application-Specific Processors
Application-specific instructions can significantly improve the performance, energy-efficiency, and code size of configurable processors. While generating new instructions from application-specific operation patterns has been a common way to improve the instruction set (IS) of a configurable processor, automating the design of IS’s for given applications poses new challenges. This IS synthesis ...
متن کاملDeriving an Efficient, Application-Specific, FPGA-Based Pipelined Processor
Hardware accelerators outperform equivalent software implementations through the exploitation of both spatial and temporal parallelism. Determining the correct levels of each in order to maximize system performance is a challenging task. We present techniques for exploring the design space of a highlevel pipelined architecture to balance pipeline stages and optimize performance. Consideration i...
متن کاملArea-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration
Instruction set extension (ISE) is an effective approach to improve the processor performance without tremendous modification in its core architecture. To execute ISE(s), a processor core must be augmented with a new functional unit, called application specific functional unit (ASFU), which consists of multiple hardware implementation options of ISEs (ISE_HW). Obviously, since ISE_HW increases ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: ACM Transactions on Design Automation of Electronic Systems
سال: 2012
ISSN: 1084-4309,1557-7309
DOI: 10.1145/2348839.2348843